This work presents a low-power photoplethysmography (PPG) readout integrated circuit (IC) that achieves a wide dynamic range (DR) through the direct integration of a voltagecontrolled oscillator (VCO)-based quantizer into the photodiode driver. Conventional PPG readout circuits rely on either transimpedance amplifier (TIA) or light-to-digital converter (LDC) topologies, both of which require auxiliary DC suppression loops. These additional loops not only raise power consumption but also limit the achievable DR. The proposed design eliminates the need for such circuits by embedding a linear regulator with a mirroring scale calibrator and a time-domain quantizer. The quantizer provides first-order noise shaping, enabling accurate extraction of the AC PPG signal while the regulator directly handles the large DC current component. Post-layout simulations show that the proposed readout achieves a signal-to-noise-and-distortion ratio (SNDR) of 40.0 dB at 10 μA DC current while consuming only 0.80 μW from a 2.5 V supply. The circuit demonstrates excellent stability across process–voltage–temperature (PVT) corners and maintains high accuracy over a wide DC current range. These features, combined with a compact silicon area of 0.725 mm2 using TSMC 250 nm bipolar–CMOS–DMOS (BCD) process, make the proposed IC an attractive candidate for next-generation wearable and biomedical sensing platforms.
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